Datasheet

71M6541D/F/G and 71M6542F/G Data Sheet
Rev 4 89
Table 70: Wake Bits
Name
Location
RST
WK
Dir
Description
EW_DIO4
28B3[2] 0 – R/W
Connects SEGDIO4 to the WAKE logic and permits
SEGDIO4 rising to wake the part. This bit has no effect
unless SEGDIO4 is configured as a digital input.
EW_DIO52
28B3[1] 0 – R/W
Connects DIO52 to the WAKE logic and permits DIO52
high-level to wake the part (71M6542F/G only). This bit
has no effect unless DIO52 is configured as a digital
input.
EW_DIO55
28B3[0] 0 – R/W
Connects DIO55 to the WAKE logic and permits DIO55
high-level
to wake the part. This bit has no effect unless
DIO55 is configured as a digital input.
WAKE_ARM
28B2[5] 0 – R/W
Arms the WAKE timer and loads it with the value in the
WAKE_TMR register (I/O RAM 0x2880). When SLP
mode or LCD mode is asserted by the MPU, the WAKE
timer becomes active.
EW_PB
28B3[3] 0 – R/W
Connects the PB pin to the WAKE logic and permits PB
high-level to wake the part. PB is always configured as
an input.
EW_RX
28B3[4] 0 – R/W
Connects the RX pin to the WAKE logic and permits RX
rising to wake the part. See 3.4.1 for de-bounce issues.
WF_DIO4
28B1[2] 0 – R
SEGDIO4 flag bit. If SEGDIO4 is configured to wake
the part, this bit is set whenever SEGDIO4 rises. It is
held in reset if SEGDIO4 is not configured for wakeup.
WF_DIO52
28B1[1] 0 – R
SEGDIO52 flag bit. If SEGDIO52 is configured to wake
the part, this bit is set whenever SEGDIO52 is a high
level. It is held in reset if SEGDIO52 is not configured
for wakeup (71M6542F/G only).
WF_DIO55
28B1[0] 0 – R
SEGDIO55 flag bit. If SEGDIO55 is configured to wake
the part, this bit is set whenever SEGDIO55 is a high
level. It is held in reset if SEGDIO55 is not configured
for wakeup.
WF_TMR
28B1[5]
0
–
R
Indicates that the Wake timer caused the part to wake up.
WF_PB
28B1[3]
0
–
R
Indicates that the PB pin caused the part to wake.
WF_RX
28B1[4]
0
–
R
Indicates that RX pin caused the part to wake.
WF_RST
WF_RSTBIT
WF_ERST
WF_CSTART
WF_BADVDD
28B0[6]
28B0[5]
28B0[3]
28B0[7]
28B0[2]
*
*
*
*
*
– R
Indicates that the RST pin, E_RST pin, RESET bit (I/O
RAM 0x2200[3]), the cold start detector, or low voltage
on the VBAT pin caused the part to reset.
*See Table 71 for details.