Datasheet

71M6541D/F/G and 71M6542F/G Data Sheet
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit
patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric
values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are
provided for guidance.
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Appendix B: Revision History
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
PAGES
CHANGED
1.0 3/11 Initial release
—
1.1 4/11
Removed the information about 18mW typ consumption at 3.3V
in sleep mode from the Features section
1
Updated the Temperature Measurement Equation and
Temperature Error parameters in Table 99
141
2 11/11
Promoted 71M6542G to production level (Table 122)
Added references to 71M6541G/2G throughout the document,
as appropriate.
Added missing data sheet title header to odd and even pages.
Corrected errata detected since the previous v1.1 (see
indicated pages changed).
Added section 6.7 on page 156.
1, 9, 10, 27,
49, 54, 56,
62, 97, 120
3 10/13
Added warning note on SPI Flash Mode section, added page
numbers and footers for the document, updated IEN0 Bit
Function and External MPU Interrupts table, changed
CECONFIG bit 23 to reserved, corrected SPI Slave port
diagram (Figure 27), added 010 and 011 combination on the
RCMD[4:0] Bits table, updated the text description of the Signal
Input Pins section, combined columns 3 and 4 of Table 34,
updated the Interrupt Structure diagram, changed FLSHPG to
PGADR on Table 12, included additional LSBs for ce41a04
(Table 85, Table 87, Table 90, and Table 91), corrected the
OPT_TXE active definition, updated the required CE code and
settings notes about MUX_DIV[3:0]
All
4 3/14
Removed future status from 71M6541G and removed
71M6541G-IGTR/F in the Ordering Information table (Table
122)
164