User guide

71M6533-DB Demo Board User’s Manual
Page: 36 of 75 ` REV 3
From the voltage measurement, we determine that
1.
1
VXV
EA
We use the other two measurements to determine
S
and A
XI
.
2.
1)cos(1
)0cos(
)0cos(
0
SXIXV
SXIXV
AA
IV
AAIV
E
2a.
)cos(
1
0
S
XIXV
E
AA
3.
1
)60cos(
)60cos(
1
)60cos(
)60cos(
60
S
XIXV
SXIXV
AA
IV
AAIV
E
3a.
1
)60cos(
)sin()60sin()cos()60cos(
60
SSXIXV
AA
E
1)sin()60tan()cos(
SXIXVSXIXV
AAAA
Combining 2a and 3a:
4.
)tan()60tan()1(
0060 S
EEE
5.
)60tan()1(
)tan(
0
060
E
EE
S
6.
)60tan()1(
tan
0
060
1
E
EE
S
and from 2a:
7.
)cos(
1
0
SXV
XI
A
E
A
Now that we know the A
XV
, A
XI
, and
S
errors, we calculate the new calibration voltage gain coefficient from the
previous ones:
XV
NEW
A
VCAL
VCAL
_
_
We calculate PHADJ from
S
, the desired phase lag:
)2cos()21(1)tan()2sin()21(
)2cos()21(2)21(1)tan(
2
0
9
0
9
0
929
20
TfTf
Tf
PHADJ
S
S