Datasheet
71M6521DE/DH/FE Data Sheet
Page: 80 of 107 Rev 3
RTC_DEC_SEC
RTC_INC_SEC
201C[1]
201C[0]
0
0
0
0
W
RTC time correction bits. Only one bit may be pulsed at a time.
When pulsed, causes the RTC time value to be incremented (or
decremented) by an additional second the next time the RTC_SEC
register is clocked. The pulse width may be any value. If an
additional correction is desired, the MPU must wait 2 seconds
before pulsing one of the bits again. Each write to one of these bits
must be preceded by a write to 201F (WE).
RTM_E
2002[3]
0
0
R/W
Real Time Monitor enable. When ‘0’, the RTM output is low. This
bit enables the two wire version of RTM
RTM0[7:0]
RTM1[7:0]
RTM2[7:0]
RTM3[7:0]
2060
2061
2062
2063
0
0
0
0
0
0
0
0
R/W
Four RTM probes. Before each CE code pass, the values of these
registers are serially output on the RTM pin. The RTM registers are
ignored when RTM_E=0.
SECURE
SFRB2[6]
0
--
R/W
Enables security provisions that prevent external reading of flash
memory and CE program RAM. This bit is reset on chip reset and
may only be set. Attempts to write zero are ignored.
SLEEP
20A9[6]
0
0
W
Takes the 6521DE/DH/FE to sleep mode. Ignored if system power
is present. The part will wake when the autowake timer times out,
when push button is pushed, or when system power returns.
SUM_CYCLES[5:0]
2001[5:0]
0
0
R/W
The number of pre-summer outputs summed in the final summer.
TMUX[4:0]
20AA[4:0]
2
--
R/W
Selects one of 32 signals for TMUXOUT.
[4:0]
Selected Signal
[4:0]
Selected Signal
0x00
DGND (analog)
0x01
Reserved
0x02
Reserved
0x03
Reserved
0x04
Reserved
0x05
Reserved
0x06
VBIAS (analog)
0x07
Not used
0x08
Reserved
0x09
Reserved
0x0A
Reserved
0x0B
-0x13
Reserved
0x14
RTM (Real time
output from CE)
0x15
WDTR_E, comparator 1
Output AND V1LT3)
0x16 –
0x17
Not used
0x18
RXD, from optical in-
terface, after optional
inversion
0x19
MUX_SYNC
0x1A
CK_10M
0x1B
CK_MPU
0x1C
Reserved
0x1D
RTCLK_2P5
0x1E
CE_BUSY
0x1F
XFER_BUSY
TRIM[7:0]
20FF 0 0 R/W
Contains TRIMT[7:0], TRIMBGA,TRIMBGB or TRIMM[2:0] depending
on the value written to TRIMSEL[3:0]. If TRIMBGB = 0, the device is
a 71M6521DE/FE, else it is a 71M6521DH.
TRIMSEL[3:0]
20FD[3:0] 0 0 R/W
Selects the temperature trim fuse to be read with the TRIM
register:
TRIMSEL[3:0]
Trim Fuse
Purpose
1
TRIMT[7:0]
Trim for the magnitude of
VREF
4
TRIMM[2:0]
Trim values related to
temperature compensation
5
TRIMBGA
6
TRIMBGB