Datasheet

71M6521DE/DH/FE Data Sheet
Page: 68 of 107 Rev 3
LCD_NUM
SEG in Addition
to SEG0-SEG18
Total Number of LCD
Segment Pins In-
cluding SEG0-SEG18
DIO Pins in Addition
to DIO1-DIO2
Total Number of DIO
Pins Including DIO1,
DIO2
0 - 19 4-11, 14-17 14
1 - 19 4-11, 14-17 14
2 - 19 4-11, 14-17 14
3 - 19 4-11, 14-17 14
4 - 19 4-11, 14-17 14
5 37 20 4-11, 14-16 13
6 36-37 21 4-11, 14-15 12
7 35-37 22 4-11, 14 11
8 34-37 23 4-11 10
9 34-37 23 4-11 10
10 34-37 23 4-11 10
11 31, 34-37 24 4-10 9
12 30-31, 34-37 25 4-9 8
13 29-31, 34-37 26 4-8 7
14 28-31, 34-37 27 4-7 6
15 27-31, 34-37 28 4-6 5
16 26-31, 34-37 29 4-5 4
17 25-31, 34-37 30 4 3
18 24-31, 34-37 31 None 2
Note: LCD segment numbers are given without CKTEST/SEG19, E_RXTX/SEG38, E_TCLK/SEG33, and
E_RST/SEG32.
Table 65: LCD and DIO Pin Assignment by LCD_NUM for the LQFP-64 Package
Connecting I
2
C EEPROMs
I
2
C EEPROMs or other I
2
C compatible devices should be connected to the DIO pins DIO4 and DIO5, as shown in
Figure 35. Pull-up resistors of roughly 10k to V3P3D (to ensure operation in BROWNOUT mode) should be used for
both SCL and SDA signals. The DIO_EEX register in I/O RAM must be set to 01 in order to convert the DIO pins
DIO4 and DIO5 to I
2
C pins SCL and SDA
.
Figure 35: I
2
C EEPROM Connection
DIO4
DIO5
71M6521
EEPROM
SCL
SDA
V3P3D
10kΩ
10kΩ
DIO4
DIO5
71M6521
EEPROM
SCL
SDA
V3P3D
10kΩ
10kΩ