Datasheet

71M6521DE/DH/FE Data Sheet
Page: 66 of 107 Rev 3
Connecting LCDs
The 71M6521DE/DH/FE has a LCD controller on-chip capable of controlling static or multiplexed LCDs. Figure 34
shows the basic connection for a LCD.
Figure 34: Connecting LCDs
The LCD segment pins can be organized in the following groups:
1. Nineteen pins are dedicated LCD segment pins (SEG0 to SEG18).
2. Four pins are dual-function pins CKTEST/SEG19, E_RXTX/SEG38, E_TCLK/SEG33, and E_RST/SEG32.
3. Twelve pins are available as combined DIO and segment pins SEG24/DIO4 to SEG31/DIO11 and
SEG34/DIO14 to SEG37/DIO17)
4. The QFN-68 package adds the three combination pins SEG39/DIO19 to SEG41/DIO21.
The split between DIO and LCD use of the combined pins is controlled with the DIO register LCD_NUM. LCD_NUM
can be assigned any number between 0 and 18. The first dual-purpose pin to be allocated as LCD is SEG41/DIO21
(on the 68-pin QFN package). Thus if LCD_NUM=2, SEG41 and SEG 40 will be configured as LCD. The remaining
SEG39 to SEG24 will be configured as DIO19 to DIO4. DIO1 and DIO2 are always available, if not used for the
optical port.
Note that pins CKTEST/SEG19, E_RXTX/SEG38, E_TCLK/SEG33, and E_RST/SEG32 are not affected by
LCD_NUM.
Table 64 and Table 65 show the allocation of DIO and segment pins as a function of LCD_NUM for both package
types.
segments
6521
LCD
commons