Datasheet

71M6521DE/DH/FE Data Sheet
Page: 24 of 107 Rev 3
Using Timer 1
Using Internal Baud Rate Generator
UART 0
2
smod
* f
CKMPU
/ (384 * (256-TH1)) 2
smod
* f
CKMPU
/(64 * (2
10
-S0REL))
UART 1
N/A f
CKMPU
/(32 * (2
10
-S1REL))
Note: S0REL and S1REL are 10-bit values derived by combining bits from the respective timer reload registers. SMOD
is the SMOD bit in the SFR PCON. TH1 is the high byte of timer 1.
Table 13: Baud Rate Generation
UART 0 UART 1
Mode 0
N/A
Start bit, 8 data bits, parity, stop bit, variable baud
rate (internal baud rate generator)
Mode 1
Start bit, 8 data bits, stop bit, variable baud
rate (internal baud rate generator or timer 1)
Start bit, 8 data bits, stop bit, variable baud rate
(internal baud rate generator)
Mode 2
Start bit, 8 data bits, parity, stop bit, fixed
baud rate 1/32 or 1/64 of f
CKMPU
N/A
Mode 3
Start bit, 8 data bits, parity, stop bit, variable
baud rate (internal baud rate generator or
timer 1)
N/A
Table 14: UART Modes
Parity of serial data is available through the P flag of the accumulator. Seven-bit serial modes with parity,
such as those used by the FLAG protocol, can be simulated by setting and reading bit 7 of 8-bit output data.
Seven-bit serial modes without parity can be simulated by setting bit 7 to a constant 1. 8-bit serial modes
with parity can be simulated by setting and reading the 9
th
bit, using the control bits TB80 (S0CON.3) and
TB81 (S1CON.3) in the S0COn and S1CON SFRs for transmit and RB81 (S1CON.2) for receive operations.
SM20 (S0CON.5) and SM21 (S1CON.5) can be used as handshake signals for inter-processor communication in multi-
processor systems.
Serial Interface 0 Control Register (S0CON).
The function of the UART0 depends on the setting of the Serial Port Control Register S0CON.
MSB LSB
SM0 SM1 SM20 REN0 TB80 RB80 TI0 RI0
Table 15: The S0CON Register
Serial Interface 1 Control Register (S1CON).
The function of the serial port depends on the setting of the Serial Port Control Register S1CON.