Datasheet

71M6521DE/DH/FE Data Sheet
Rev 3 Page: 19 of 107
Internal Data Memory: The lower 128 bytes contain working registers and bit-addressable memory. The lower 32
bytes form four banks of eight registers (R0-R7). Two bits on the program memory status word (PSW) select which
bank is in use. The next 16 bytes form a block of bit-addressable memory space at bit addressees 0x00-0x7F. All of
the bytes in the lower 128 bytes are accessible through direct or indirect addressing. Table 6 shows the internal data
memory map.
Address
Direct addressing
Indirect addressing
0xFF
Special Function Registers
(SFRs)
RAM
0x80
0x7F
Byte-addressable area
0x30
0x2F
Bit-addressable area
0x20
0x1F
Register banks R0…R7
0x00
Table 6: Internal Data Memory Map
Special Function Registers (SFRs)
A map of the Special Function Registers is shown in Table 7.
Hex\Bin
Bit-address-
able
Byte-addressable
Bin/Hex
X000 X001 X010 X011 X100 X101 X110 X111
F8
INTBITS
FF
F0
B
F7
E8
WDI
EF
E0
A
E7
D8
WDCON
DF
D0
PSW
D7
C8
T2CON
CF
C0
IRCON
C7
B8
IEN1
IP1 S0RELH S1RELH USR2
BF
B0
FLSHCTL
PGADR
B7
A8
IEN0
IP0
S0RELL
AF
A0
P2
DIR2
DIR0
A7
98
S0CON S0BUF
IEN2
S1CON S1BUF S1RELL
EEDATA EECTRL
9F
90
P1
DIR1
DPS
ERASE
97
88
TCON
TMOD
TL0
TL1
TH0
TH1
CKCON
8F
80
P0
SP
DPL
DPH
DPL1
DPH1
WDTREL
PCON
87
Table 7: Special Function Registers Locations
Only a few addresses are occupied, the others are not implemented. SFRs specific to the 652X are shown in bold
print. Any read access to unimplemented addresses will return undefined data, while any write access will have no
effect. The registers at 0x80, 0x88, 0x90, etc., are bit-addressable, all others are byte-addressable.