Datasheet

71M6521DE/DH/FE Data Sheet
Page: 12 of 107 Rev 3
It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as controlled by
CROSS in the “A” position, the output voltage is:
Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff
With all switches set to the “B” position by applying the inverted CROSS signal, the output voltage is:
Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or
Voutp – Voutn = G (Vinp – Vinn) - G Voff
Thus, when CROSS is toggled, e.g. after each multiplexer cycle, the offset will alternately appear on the output as
positive and negative, which results in the offset effectively being eliminated, regardless of its polarity or magnitude.
When CROSS is high, the hookup of the amplifier input devices is reversed. This preserves the overall polarity of
that amplifier gain; it inverts its input offset. By alternately reversing the connection, the amplifier’s offset is averaged
to zero. This removes the most significant long-term drift mechanism in the voltage reference. The CHOP_E bits
control the behavior of CROSS. The CROSS signal will reverse the amplifier connection in the voltage reference in
order to negate the effects of its offset. On the first CK32 rising edge after the last mux state of its sequence, the mux
will wait one additional CK32 cycle before beginning a new frame. At the beginning of this cycle, the value of CROSS
will be updated according to the CHOP_E bits. The extra CK32 cycle allows time for the chopped VREF to settle.
During this cycle, MUXSYNC is held high. The leading edge of muxsync initiates a pass through the CE program
sequence. The beginning of the sequence is the serial readout of the 4 RTM words.
CHOP_E has 3 states: positive, reverse, and chop. In the ‘positive’ state, CROSS is held low. In the ‘reverse’ state,
CROSS is held high. In the ‘chop’ state, CROSS is toggled near the end of each Mux Frame, as described above. It
is desirable that CROSS take on alternate values at the beginning of each Mux cycle. For this reason, if ‘chop’ state
is selected, CROSS will not toggle at the end of the last Mux cycle in a SUM cycle.
The internal bias voltage VBIAS (typically 1.6 V) is used by the ADC when measuring the temperature and battery
monitor signals.
Temperature Sensor
The 71M6521DE/DH/FE includes an on-chip temperature sensor implemented as a bandgap reference. It is used to
determine the die temperature The MPU may request an alternate multiplexer cycle containing the temperature
sensor output by asserting MUX_ALT.
The primary use of the temperature data is to determine the magnitude of compensation required to offset the
thermal drift in the system (see section titled “Temperature Compensation”).