Datasheet
         71M6521DE/DH/FE Data Sheet 
Page: 102 of 107    Rev 3   
PIN DESCRIPTIONS 
Power/Ground Pins: 
Name  Type  Circuit  Description 
GNDA    P 
-- 
Analog ground: This pin should be connected directly to the ground plane. 
GNDD    P  --  Digital ground: This pin should be connected directly to the ground plane. 
V3P3A    P 
-- 
Analog power supply: A 3.3V power supply should be connected to this pin, must 
be the same voltage as V3P3SYS.  
V3P3SYS  P  --  System 3.3V supply. This pin should be connected to a 3.3V power supply. 
V3P3D    O 
13 
Auxiliary voltage output of the chip, controlled by the internal 3.3V selection switch. 
In mission mode, this pin is internally connected to V3P3SYS. In BROWNOUT 
mode, it is internally connected to VBAT. This pin is high impedance in LCD and 
sleep mode. 
VBAT  P  12 
Battery backup power supply. A battery or super-capacitor is to be connected 
between VBAT and GNDD. If no battery is used, connect VBAT to V3P3SYS.  
V2P5  O  10 
Output of the internal 2.5 V regulator. A 0.1µF capacitor to GNDA should be 
connected to this pin. 
Analog Pins: 
Name  Type  Circuit  Description 
IA, IB  I 
6 
Line Current Sense Inputs: These pins are voltage inputs to the internal A/D 
converter. Typically, they are connected to the outputs of current sensors. Unused 
pins must be connected to V3P3A. 
VA, VB  I 
6 
Line Voltage Sense Inputs: These pins are voltage inputs to the internal A/D 
converter. Typically, they are connected to the outputs of resistor dividers. Unused 
pins must be connected to V3P3A or tied to the voltage sense input that is in 
use. 
V1  I 
7 
Comparator Input: This pin is a voltage input to the internal power-fail comparator. 
The input voltage is compared to the internal BIAS voltage (1.6 V). If the input 
voltage is above VBIAS, the comparator output will be high (1). If the comparator 
output is lower, a voltage fault will occur and the chip will be forced to battery 
mode. 
VREF  O  9 
Voltage Reference for the ADC. This pin is normally disabled by setting the 
VREF_CAL bit in the I/O RAM and can then be left unconnected. If enabled, a 
0.1µF capacitor to GNDA should be connected.  
XIN 
XOUT  
I 
8 
Crystal Inputs: A 32kHz crystal should be connected across these pins. Typically, a 
27pF capacitor is also connected from each pin to GNDA. It is important to 
minimize the capacitance between these pins. See the crystal manufacturer 
datasheet for details. 
Pin types: P = Power, O = Output, I = Input, I/O = Input/Output 
The circuit number denotes the equivalent circuit, as specified under “I/O Equivalent Circuits”. 










