Datasheet

71M6511/71M6511H
Single-Phase Energy Meter IC
DATA SHEET
NOVEMBER 2010
Page: 58 of 98 © 2005–2010 Teridian Semiconductor Corporation V2.7
A Maxim Integrated Products Brand
LCD38
2056
RESERVED
LCD39
2057
RESERVED
LCD40
2058
RESERVED
LCD41
2059
RESERVED
RTM Probes:
RTM0
2060
RTM0[7:0]
RTM1
2061
RTM1[7:0]
RTM2
2062
RTM2[7:0]
RTM3
2063
RTM3[7:0]
Synchronous Serial Interface:
SSI
2070
SSI_EN SSI_10M SSI_CKGATE SSI_FSIZE[1:0] SSI_FPOL SSI_RDYEN SSI_RDYPOL
SSI_BEG
2071
SSI_BEG[7:0]
SSI_END
2072
SSI_END[7:0]
Fuse Selection Registers:
TRIMSEL
20FD
TRIMSEL[7:0]
TRIM
20FF
TRIM[7:0]
SFR MAP (SFRs Specific to TERIDIAN 80515) – In Numerical Order
‘Not Used’ bits are blacked out and contain no memory and are read by the MPU as zero. RESERVED bits are in use and
should not be changed. This table lists only the SFR registers that are not generic 8051 SFR registers.
Name
SFR
Addr
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Digital I/O:
P0
80
DIO_0[7:4] (Port 0)
RESERVED
DIR0
A2
DIO_DIR0[7:4]
1111
P1
90
DIO_1[7:6] (Port 1) DIO_1[3:0] (Port 1)
DIR1
91
DIO_DIR1[7:6]
DIO_DIR1[3:0]
P2
A0
RESERVED
DIO_2[1:0] (Port 2)
DIR2
A1
1111
DIO_DIR2[1:0]
Interrupts and WD Timer:
INTBITS
F8
INT6 INT5 INT4 INT3 INT2 INT1 INT0
WDI
E8
WD_RST IE_RTC IE_XFER
Flash:
ERASE
94
FLSH_ERASE[7:0]
FLSHCTL
B2
PREBOOT SECURE FLSH_MEEN FLSH_PWE
PGADR
B7
FLSH_PGADR[6:0]
Serial EEPROM:
9E
EEDATA[7:0]
9F
EECTRL[7:0]