Datasheet

71M6511/71M6511H

Single-Phase Energy Meter IC

DATA SHEET

NOVEMBER 2010

A Maxim Integrated Products Brand

XFER_BUSY and RTC_1SEC, which are OR-ed together, have their own enable and flag bits in addition to the interrupt 6

enable and flag bits (see Table 45), and these interrupts must be cleared by the MPU software.

External

Interrupt

Connection Polarity Flag Reset

0 Digital I/O High Priority see DIO_Rx automatic

1 Digital I/O Low Priority see DIO_Rx automatic

2 Comparator 2 or 3 falling automatic

3 CE_BUSY falling automatic

4 Comparator 2 or 3 rising automatic

5 EEPROM busy falling automatic

6 XFER_BUSY OR RTC_1SEC falling manual

Table 44: External MPU Interrupts

Interrupt 6 is edge-sensitive. The RTC_1SEC interrupt from the RTC and the XFER_BUSY interrupt from the CE are com-

bined using a logic OR function and the result is routed into interrupt 6. Therefore, both flags must be cleared at least once

during initialization, and both flags must always be cleared before exiting the interrupt service routine (ISR) for interrupt 6.

Note 1: If clearing of both flags is not performed, then no edge can occur to trigger interrupt 6 later resulting in the ISR for the

XFER_BUSY ceasing to run.

Note 2: Clearing both flags reliably requires some care. Either flag can be set by hardware while interrupt 6 code is running on

behalf of the other interrupt. In this situation, the unprocessed interrupt can create a lockout condition similar to the one in note

1. To prevent this lockout one must always process both interrupt flags in the same service routine.

Note 3: After a reset from an in-circuit emulator, the IE_XFER flag may not be cleared because the CE may continue to run.

The flags for the RTC_1SEC and the XFER_BUSY interrupts are located in the WDI SFR (address 0xE8).

Enable Bit Description Flag Bit Description

EX0 Enable external interrupt 0 IE0 External interrupt 0 flag

EX1 Enable external interrupt 1 IE1 External interrupt 1 flag

EX2 Enable external interrupt 2 IEX2 External interrupt 2 flag

EX3 Enable external interrupt 3 IEX3 External interrupt 3 flag

EX4 Enable external interrupt 4 IEX4 External interrupt 4 flag

EX5 Enable external interrupt 5 IEX5 External interrupt 5 flag

EX6 Enable external interrupt 6 IEX6 External interrupt 6 flag

EX_XFER Enable XFER_BUSY interrupt IE_XFER XFER_BUSY interrupt flag

EX_RTC Enable RTC_1SEC interrupt IE_RTC RTC_1SEC interrupt flag

Table 45: Control Bits for External Interrupts