User`s manual

20 21MAXDATA PLATINUM 7200 IR M6Platform Description

Processors

The PLATINUM 7200 IR Server supports from one to four physical processors, either 64-bit Intel

Xeon™ processor MP with 1 MB L2 Cache, 64-bit Intel

Xeon™ processor MP with 8 MB L3 Cache, or

Dual-Core Intel

Xeon™ processor 7000 sequence. These processors are targeted for multiprocessor

servers. Several architectural and microarchitectural enhancements have been added to this processor,

including an increased L2 cache size and an integrated L3 cache (64-bit Intel

Xeon™ Processor MP

with 8 MB L3 Cache).

Plug-in Voltage Regulator Module (VRM) Converters

Two types of plug-in voltage regulator module (VRM) converters are used in the system:

• L3Cache VRM9DO

• VRM 10.2

Input power to the Main Board is 12 V and 3.3 V Standby (VSB). All other voltages must be generated

on the board set including 3.3 V and 5 V. There are numerous VRDs used to generate the required

voltage levels. Processor core voltage to processors 1 and 2 is generated by embedded VRDs.

Processors 3 and 4 require one plug-in 10.2 VRM each to provide the core voltage. A plug-in VRM

9.1 is required when using more than 2 processors with iL3 cache.

System Memory

The Memory Boards connect to the Main Board through x16 PCI Express connectors. Between one

and four Memory Boards can be installed. Each Memory Board has four DIMM sockets and supports

two DDR2 channels with two DIMMs per channel. The Memory Boards support both single-rank and

double-rank registered DIMMs.

The DIMMs on each Memory Board must be installed in pairs. Each pair is referred to as a bank.

A bank may consist of one rank (a pair of single-sided DIMMs) or two ranks (a pair of double-sided

DIMMs). The BIOS executes a memory test prior to configuring the memory in POST and when a

Memory Board is inserted into the system during a hot plug operation.

A DIMM bank will be disabled if any of the following occur:

• Uncorrectable errors are found during a memory test

• An uncorrectable ECC error occurred during runtime

• The DIMM rank correctable error count passes the error sparing threshold on a Memory Board

where sparing is enabled

• A Memory Board fails

If a DIMM fails the memory test, an LED will light on the Memory Board to identify the location of the

bad DIMM and the DIMM bank will be disabled. The failing DIMM event is logged to the System Event

Log (SEL) and the BIOS disables the memory DIMM and/or the Memory Board. Upon subsequent

reboots, this memory is not initialized unless the BIOS setup option “Retest all system memory” or

“Retest board memory” is selected.