Specifications

60 Matrox Mura MPX Series – System Builder’s Guide

Each GPU transmits two HD streams to a Mura card located at the other “end” of the system (C4-

C7). This results in a total bandwidth of approximately 2 GB/s per card (2 GPUs per card, each

transmitting two HD stream at approximately 500 MB/s per stream) that has to be transferred

through the PCIe fabric. The combined bandwidth of the first two Mura cards connected to the first-

level PCIe switches (C1 and C2

PCIw-SW #1) is 4 GB/s, which is at the very limit of the link’s

capability (while the burst capability of the link is indeed 4 GB/s, there’s a link overhead that must be

accounted for. This will reduce the effective limit of data that can be transferred. The amount of the

reduction is dependent on the PCIe switch architecture, and may be as high as 25-35%). We can

already expect bandwidth-related artifacts on the outputs. If we go a level deeper (PCIe-SW #5), the

combined bandwidth of the first four Mura cards is almost 8 GB/s, greater than the capacity of the

PCIe switches to handle (these are

8 links).

Now consider the following scenario:

This configuration is an example of how inputs and outputs should be placed whenever possible. In

this case, each card is transferring the equivalent of two HD streams to the other “side” of the system,

but because the bandwidth at each link remains below the capacity of the switches, there’s no problem

and the system will function properly.

General bandwidth guidelines

Specific guidelines for the installation of the Mura cards in a PCIe-based system can’t be provided, as

there are many possible motherboards and each client’s display wall implementation is custom.

Knowledge of the system architecture and the number and types of inputs is required to optimally