Specifications

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Wrong source IP is used when responding to traceroute in L3VPN setup. This is not an
indication of traffic taking wrong link. PR883701
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On all high-end MX Series devices, when a router is acting as an NTP broadcast server,
broadcast addresses must be in the default routing instance. NTP messages are not
broadcasted when the address is configured in a VPN virtual routing and forwarding
(VRF) instance. PR887646
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The jcs:dampen() function will not perform correctly if the system clock is moved to
an earlier time. PR930482
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For certain combinations of MX Series MPCs and Junos OS versions, PCI Express errors
might appear during the FPC boot process. In such a situation the PCI Express errors
are harmless and can be safely ignored. PR940339
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Backing up the configuration with transfer-on-commit does not work in an MX-VC
environment PR947444
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With FPC3-E3 type FPC, the internal pc- interface statistics on the IQ/IQ2 PIC will be
the same as the ingress interface statistics of the physical interface if family mpls is
configured. It is a cosmetic display issue. PR953183
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In multi-chassis platform, one of LCC's mastership change causes other LCC's
SPARE-SIB's Active-LED to be set abnormally instead of "actual active plane's LED".
There is no impact on operation, it is a cosmetic issue. * only if spare-SIB is SIB#0. For
example, - SCC-RE0(M),RE1(B) | LCC0-RE0(M),RE1(B) | LCC1-RE0(M),RE1(B) -
all-chassis SIB0 is spare status. - LCC0's mastership change makes the issue on LCC1.
- LCC1's spare-SIB0's active LED to be set abnormally. PR972457
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The problem is seen because CFMD is getting a configuration commit after the MX-VC
switch has happened. This commit is deleting the cfmd session and then creating a
new session which is causing the old information of action-profile to be deleted which
brings the interface back up. This problem fixes by the code correction. PR974663
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XML traceroute does not display as-numbers. PR988727
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In PPPoE over ATM subscriber management environment with active subscribers is
present, when issue with the "show arp" command, an ARP core file is generated.
PR1006306
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The overhead values need to be represented with 8 bits to cover the range "-120..124",
but the microcode is only using the last 7 bits. PR1020446
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CPQ RLDRAM ECC single and double bit error will generate CM alarm. "show chassis
alarms" command can be used to view CM alarm. Details ======= 1> CPQ RLDRAM
ECC single bit error in last 10 secs will raise minor CM alarm. 2> No CPQ RLDRAM ECC
single bit error in last 10 secs will clear minor CM alarm. 3> CPQ RLDRAM ECC double
bit error will raise Major CM alarm (this alarm will not be cleared until the FPC is
restarted). PR1023146
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Recurring LMEM data errors may cause Lu chip wedge. PR1033660
Copyright © 2015, Juniper Networks, Inc.76
Release Notes: Junos OS Release 13.3R6 for the EX Series, M Series, MX Series, PTX Series, and T Series