User`s guide

Polling M o de
Polling Mode
Polling m od e fo r the k ern el is de signed to execute target app lic a tion s a t
sample times close to the limit of the hardware (CPU). Using polling mode
with high-speed and low-latency I/O boards and drivers a llow s you to achieve
smaller sample times for applications that you cannot achieve using the
interrupt m o de of the xPC Target software.
Polling mo de has two main appl ica tions:
• Control applications — Control applications of average model size and I/O
complexity that are executed at very small sample times (Ts = 5 to 50 µs)
• DSP a pplications — Sample-based DSP applications (mainly audio and
speech) of average model size and I/O complexity that are executed at very
high sample rates (Fs = 20 to 200 kHz)
Introducing Polling Mode
Polling mode for the kernel does not have the 8 µs of latency that interrupt
modedoes.Thisisbecausethekerneldoesnotallowinterruptsatall,sothe
CPU can use this extra time for executing model code.
Polling mode is sometimes seen as a “primitive” or “brute force” real-time
execution scheme. Nevertheless, when a real-time application executes at a
givenbasesampletimeininterruptmodeandoverloadstheCPU,switching
to polling mod e is o ften th e o n ly alt ern a ti ve to get the application to execute
at the required sample time.
Polling me an s that the kernel waits in an empty while loop until the time
at which the next model step has to be executed is reached. Then the next
model step is executed. At least a counter implemented in hardware has
to be accessible by the kernel in order to get a base reference for when the
next model step execution has to commence. The kernel polls this hardware
counter. If this hardware counter mustbeoutsidetheCPU,e.g.,inthechip
setorevenonanISAorPCIboard,thecountervaluecanonlyberetrieved
by an I/O or memory access cycle that again in troduces latency. This latency
usually eats u p the freed-up time of polling mode. Fortunately, since the
introduction of the Pentium C PU familyfromIntel,theCPUisequippedwith
a 64 bit counter on the CPU substrate itself, which com mences counting at
power-up time and counts up driven by the actual clock rate of the CPU.
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