User`s guide

14 Constructing Simulation Tests Using the Verification Manager
14-8
• Display > Active blocks only — If enabled, lists only the blocks that are
enabled.
Note: If both Overridden blocks only and Active blocks only are enabled, no
Model Verification blocks appear. If both Overridden blocks only and Active
blocks only are disabled, all Model Verification blocks appear.
In this example, the Verification block settings pane displays five Check
Static Upper Bound blocks. Four are in the top level of the model, and one is in a
subsystem.
The Requirements pane lists the requirements document links for the current
signal group. For details on adding requirement document links in the Signal
Builder dialog box, see “Link Test Cases to Requirements Documents Using the
Verification Manager” on page 14-19.
5
For this example, select to close the Requirements pane.
6
To display only the enabled Model Verification blocks for the current signal group, in
the Verification block settings toolbar, select the List Enabled Verifications tool
.
7
To redisplay all Model Verification blocks for the current group, click the Show
Verification Block Hierarchy tool .