User`s guide

11 Overview of Component Verification
11-4
Basic Approach to Component Verification
In this section...
“Workflow for Component Verification” on page 11-4
“Verify a Component Independently of the Container Model” on page 11-6
“Verify a Model Block in the Context of the Container Model” on page 11-7
Workflow for Component Verification
The following graphic illustrates the common workflow for component verification.
Component
to
verify
Open-loop
simulation
Log
signals
Generate
harness
Closed-loop
simulation
Log
signals
Unit testing
of code
Simulate component,
execute in
SIL or PIL mode
Component
to
verify
Harness model
Signal
Builder
Merge
test case
data
Simulink
Design
Verifier
analysis
Data
file
Merged
test case
data file
Data
file
Data
file
This graphic illustrates the two approaches for component verification, described in
“Component Verification” on page 11-2:
1
Choose your approach for component verification: