User guide

66 www.xilinx.com System Generator for DSP Getting Started Guide
UG639 (v 14.3) October 16, 2012
Chapter 4: Getting Started
Lesson 6 - Designing Filters
Introduction
Digital filters are a common DSP operation and especially well suited to implementation in FPGAs. High-
performance applications benefit greatly from parallel filters that can return a results on every clock cycle. The
Virtex®- 5 device includes up to 550 parallel multipliers. The FIR Compiler is designed to use these multipliers in
the most efficient manner for creating commonly used FIR filters. An alternative implementation is available called
“distributed arithmetic” that creates FIR filters without using multipliers by employing a shift-add technique. This
can be used for smaller devices when the available multipliers have been allocated to other functions.