User guide

24 www.xilinx.com System Generator for DSP Getting Started Guide
UG639 (v 14.3) October 16, 2012
Chapter 4: Getting Started
Lesson 1 - Design Creation Basics
The System Generator Design Flow
System Generator works within the Simulink model-based design methodology. Often an executable spec is created
using the standard Simulink block sets. This spec can be designed using floating-point numerical precision and
without hardware detail. Once the functionality and basic dataflow issues have been defined, System Generator can
be used to specify the hardware implementation details for the Xilinx devices. System Generator uses the Xilinx
DSP blockset for Simulink and will automatically invoke Xilinx Core Generator™ to generate highly-optimized
netlists for the DSP building blocks. System Generator can execute all the downstream implementation tools to
product a bitstream for programming the FPGA. An optional testbench can be created using test vectors extracted
from the Simulink environment for use with ModelSim or the Xilinx ISE
® Simulator.