User`s guide

Introduction
12-5
start time and T
f
is the simulation stop time. If T
f
is infinity, the default
sample time is set to 0.2.
To ensure a completely deterministic model (i.e, where no sample times are set
using the above rules), you should explicitly specify the sample time of all your
source blocks. Source blocks include root inport blocks and any blocks without
input ports. You do not have to set subsystem input port sample times. You
may want to do so, however, when creating modular systems.
An unconnected input implicitly sources ground. For ground blocks and ground
connections, the default sample time is derived from destination blocks or the
default rule.
Once Simulink compiles the block diagram, it creates a
model.rtw file
(analogous to an object file generated from a C file). The
model.rtw file
contains all the connection information of the model as well as the necessary
signal attributes. Thus, the timing engine in the Real-Time Workshop knows
when blocks with different rates should be executed. You cannot override this
execution order by directly calling a block (in hand-written code) in a model.
For example, the
disconnected_trigger model below will have its trigger port
source to ground which may lead to all blocks inheriting a constant sample
time. Calling the trigger function,
f(), directly from hand-code will not work
correctly and should never be done. Instead, you should use a function-call
All blocks have an inherited
sample time (T
s
= -1). They will
all be assigned a sample time of
(T
f
-T
i
)/50.