User`s guide

Template Makefiles
3-31
You can use pattern matching expressions to make the dependency rules more
general. For example, using GNU Make you could have replaced the two
"file1.o: file1.c"and"file2.o: file2.c" rules with the single rule:
%.o : %.c
cc −c $<
The $< is a special macro that equates to the dependency file (i.e., file1.c or
file2.c). Thus, using macros and the “%” pattern matching character, the
aboveexamplecanbereducedto:
SRCS = file1.c file2.c
OBJS = $(SRCS:.c=.o)
test: $(OBJS)
cc −o $@ $(OBJS)
%.o : %.c
cc −c $<
This example generates the list of objects (OBJS) from the list of sources (SRCS)
by using the string substitution feature for macro expansion. It replaces the
source file extension (
.c)withtheobjectfileextension(.o). This example also
generalized the build rule for the program,
test,tousethe“$@” special macro
that equates to the name of the current dependency target, in this case
test.