User guide
Table Of Contents
- Return to Menu
- System Generator for DSP
- Table of Contents
- About This Guide
- Introduction
- Installation
- Release Information
- Getting Started
- Introduction
- Lesson 1 - Design Creation Basics
- The System Generator Design Flow
- The Xilinx DSP Blockset
- Defining the FPGA Boundary
- Adding the System Generator Token
- Creating the DSP Design
- Generating the HDL Code
- Model-Based Design using System Generator
- Creating Input Vectors using MATLAB
- Lesson 1 Summary
- Lab Exercise: Using Simulink
- Lab Exercise: Getting Started with System Generator
- Lesson 2 - Fixed Point and Bit Operations
- Lesson 3 - System Control
- Lesson 4 - Multi-Rate Systems
- Lesson 5 - Using Memories
- Lesson 6 - Designing Filters
- Additional Examples and Tutorials
- Index
System Generator for DSP Getting Started Guide www.xilinx.com 61
UG639 (v 12.2) July 23, 2010
Lesson 2 - Fixed Point and Bit Operations
The BitBasher Block
The BitBasher block provides a textual method, based on Verilog syntax, for working with the signals at the bit
level. This block supports concatenation and slicing if the input signal to create an output. It also allows for
augmentation with constants. The BitBasher block supports up to 4 outputs that are inferred by the expressions