User guide
Table Of Contents
- Return to Menu
- System Generator for DSP
- Table of Contents
- About This Guide
- Introduction
- Installation
- Release Information
- Getting Started
- Introduction
- Lesson 1 - Design Creation Basics
- The System Generator Design Flow
- The Xilinx DSP Blockset
- Defining the FPGA Boundary
- Adding the System Generator Token
- Creating the DSP Design
- Generating the HDL Code
- Model-Based Design using System Generator
- Creating Input Vectors using MATLAB
- Lesson 1 Summary
- Lab Exercise: Using Simulink
- Lab Exercise: Getting Started with System Generator
- Lesson 2 - Fixed Point and Bit Operations
- Lesson 3 - System Control
- Lesson 4 - Multi-Rate Systems
- Lesson 5 - Using Memories
- Lesson 6 - Designing Filters
- Additional Examples and Tutorials
- Index
System Generator for DSP Getting Started Guide www.xilinx.com 53
UG639 (v 12.2) July 23, 2010
Lesson 2 - Fixed Point and Bit Operations
Lesson 2 - Fixed Point and Bit Operations
Fixed-Point Numeric Precision
System Generator supports three data types, Unsigned for positive only DSP operations, Signed which is two’s
complement used for DSP operations that involve negative numbers and Boolean for 1-bit control signals. Each
block will typically have quantization parameters. The initial quantization is defined by the Gateway In blocks.