User guide
Table Of Contents
- Return to Menu
- System Generator for DSP
- Table of Contents
- About This Guide
- Introduction
- Installation
- Release Information
- Getting Started
- Introduction
- Lesson 1 - Design Creation Basics
- The System Generator Design Flow
- The Xilinx DSP Blockset
- Defining the FPGA Boundary
- Adding the System Generator Token
- Creating the DSP Design
- Generating the HDL Code
- Model-Based Design using System Generator
- Creating Input Vectors using MATLAB
- Lesson 1 Summary
- Lab Exercise: Using Simulink
- Lab Exercise: Getting Started with System Generator
- Lesson 2 - Fixed Point and Bit Operations
- Lesson 3 - System Control
- Lesson 4 - Multi-Rate Systems
- Lesson 5 - Using Memories
- Lesson 6 - Designing Filters
- Additional Examples and Tutorials
- Index
24 www.xilinx.com System Generator for DSP Getting Started Guide
UG639 (v 12.2) July 23, 2010
Chapter 2: Installation
Note: If installation instructions for your particular platform are not provided here, please refer to the
installation instuctions that come with your Platform Kit. For instructions on how to install a Xilinx USB
Cable and cable driver software on a Windows or Linux Operating System, refer to the Xilinx
document titled: USB Cable Installation Guide
JTAG-Based Hardware Co-Simulation
Installing an ML402 Board for JTAG Hardware Co-Simulation
Installing an ML605 Board for JTAG Hardware Co-Simulation
Installing an SP601/SP605 Board for JTAG Hardware Co-Simulation
Third-Party Hardware Co-Simulation
As part of the Xilinx XtremeDSP™ Initiative, Xilinx works with distributors and many
OEMs to provide a variety of DSP prototyping and development platforms. Please refer to
the following Xilinx web site page for more information on available platforms:
http://www.xilinx.com/products/boards_kits/index.htm
Compiling Xilinx HDL Libraries
If you intend to simulate System Generator designs using ModelSim, you must compile
your IP (cores) libraries. This topic describes the procedure.
ModelSim SE
The Xilinx tool that compiles libraries for use in ModelSim SE is named compxlib. The
following command can, for example, be used to compile all the VHDL and Verilog
libraries with ModelSim SE:
compxlib –s mti_se –f all –l all
Complete instructions for running compxlib can be found in the ISE Software Manual
titled “Command Line Tool User Guide”.