User`s guide

Targ et Preferences

Select this parameter to leave the D MA channel enabled

upon completing a transfer. The channel w ill wait for the

next interrupt event trigger.

Clear this parameter to disable the DMA channel upon

completing a transfer. The DMA m odule disables

the DMA channel by clearing the RUNSTS bit in the

CONTROL register when it completes the transfer. To

use the channel again, ﬁrst reset the RUN bit in the

CONTROL register.

Note When you select Use DMA (with C28x3x) the

C280x/C28x3x ADC block, this parameter is enabled.

• Enable DST sync mode

When Sync enable is enabled, enabling this

parameter resets the destination wrap counter

(DST_WRAP_COUNT) when the DMA module receives

the SEQ1I NT interrupt/AD C S YNC signal. Disabling

this parameter resets the source wrap counter

(SCR_WRAP_COUN T) when the DMA module receives

the SEQ1INT interrupt/ADC SY NC signal.

This parameter is associated with bit 13 (SYNCSEL) in

theModeRegister(MODE).

Note When you select Use DMA (with C28x3x) the

C280x/C28x3x ADC block, this parameter is disabled.

• Set channel 1 to highest priority.

Enable this setting when D MA chan nel 1 is conﬁgured

to handle high-bandwidth data, s u c h as ADC data,

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