User`s guide

Tar get Preferences
Enable Rx interrupt
This parameter corresponds to bit 5 (RXFFIENA) of the I2C
Receive FIFO Register (I2CFFRX).
Rx FIFO interrupt level
This parameter corresponds to bit 4–0 (R XFFIL4-0) of the
I2C Receive F IFO Register (I2CFFRX).
Enable system interrupt
Select this parameter to displa y and individ ually confi gure
the following five Basic I2C Interrupt Request parameters
in the Interrupt Enable Register (I2CIER):
• Enable AAS interrupt
• Enable SCD interrupt
• Enable ARDY interrupt
• Enable NACK interrupt
• Enable AL interrupt
Enable AAS interrupt
Enable the addressed-as-slave interrupt.
When enabled, the I2C module generates an interrupt (AAS
bit = 1) upon receiving one of the following:
• Its Own ad d re ss register
• A general call (all zeros)
• Adatabyteisinfreedataformat
When enabled, the I2C module cle ars the interrupt (AAS =
0) upon receiving one of the following:
• Multiple S T ART conditi o n s (7-bit addr essi ng mod e only)
• A slave address that is different from Own address
register (10-bit addressing mode only)
• ANACKoraSTOPcondition
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