User`s guide

Tar get Preferences
Number: SPRU721, available on the Texas Instruments
Web site.
Module clock prescaler
If Mode is
Master,configure the m odule clock frequency by
entering a value from 0–255.
Module clock frequency = I2C input clock frequency /(M odule
clock prescaler +1)
The I2C specifications require a m odule clo ck frequency
between 7 MHz and 12 MHz.
The I2C input clock frequency de pends on the D SP inp ut
clock frequency and the value of the PLL Control Register
divider (PLLCR). For more information on setting the
PLLCR, consult the documentation for your specific Digital
Signal Controller.
This Module clock prescaler corresponds to bits 7–0
(IPSC) of the I2C Prescaler Register (I2CPSC).
Master clock Low-time divider
When Mode is
Master, this divider determines the duration
ofthelowstateoftheSCLlineontheI2C-bus.
The low-time duration of the master clock = Tmod x (ICCL
+d).
For more information about this value, consult the “Formula
for the Master Clock Period” section in the TMS320x280x
Inter-Integrated Circuit Module Reference Guide,Literature
Number: SPRU721A, available on the Texas Instruments
Web site.
This parameter corresponds to bits 15–0 (ICCL) of the Clock
Low-Time Divider Register (I2CCLKL).
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