User`s guide

Schedulers and Timing
Timer Period
CPU Clock Rate Base Sample Time
Low Resolu
_
(_ _)*(_ _)
_
=
ttion Clock Divider
Prescaler
__
*
Thesoftwareconfiguresthetimersothatthebaseratesampletimeforthe
coded process corresponds to the interrupt rate. Embedded IDE Link CC
calculates and configures the timer period to ensure the desired sample rate.
Different proces sor families use the timer resource and interrupt number
differently. Entrie s in the following table show the resources each family uses.
Processor
Family
Timer R esource
Interrupt
Number
Simulink
Priority
C28x™
Timer 1
6
C55x™
Timer 1
22
C6000
Timer 1
15
C672x
Timer 1
5
40 for all
processors
The minimum base rate sample time you can achieve depends on two
factors—the algorithm complexity and the CPU clock speed. The maximum
value depends on the maximum timer period value and the CPU clock speed.
If all the blocks in the model inherit their sample time value, and you do not
define the sample time, Simulink assigns a default sample time of 0.2 second.
Using Asynchronous Scheduling
Embedded IDE Link CC enables you to model and automatically generate
code for asynchronous s ystems. To do so, use the following scheduling blocks:
• Hardware Interrupt blocks for bare-board code generation mode
• Idle Task
The H ard w are Interrupt block operates by
• Generating selected hardware interrupts for the processor
• Generating corres ponding ISRs for the interrupts
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