User`s guide

3 Project Generator
When you p lan your project or algorithm, select your scheduling technique
based on your application needs.
If your application processes hardware interrupts asynchronously, add the
appropriate asynchronous scheduling blocks from the library to your model:
- A Hardw are Interrupt block, to create an interrupt service routine to
handle hardware interrupts o n the selected processor
- An Idle Task block, to create a task that runs as a separate thread
The following table lists specic scheduling blocks f or each suppo rte d
processororfamily.
DSP Chip Librar y Support Scheduling Blocks
C280x DSP/C28x3x DSP Chip
Support
Hardware Interrupt
C281x DSP Chip Support
Hardware Interrupt
C5000 Chip Support
Hardware Interrupt
C6000 Chip Support
Hardware Interrupt
Core Support
Idle Task
Simulinksetsthebaseratepriorityto40,thelowestpriority.
If your application does not service asynchronous interrupts, include o nly
the al gorithm and dev ice driver blo cks that specify the periodi c sample
times in the model.
Note Generating code from a model that does not service asynchronous
interrupts automatically enables and manages a timer interrupt. The
periodic timer interrupt clocks the entire model.
Using Synchronous Scheduling
Code that runs synchronously via a timer interrupt require s an interrupt
service routine (ISR). Each model iteration runs after an ISR services a posted
interrupt. The code generated for EmbeddedIDELinkCCusesatimer. To
calculate the timer period, the software uses the following equation:
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