User guide

System Generator for DSP User Guide www.xilinx.com 93
UG640 (v 12.2) July 23, 2010
Processing a System Generator Design with FPGA Physical Design Tools
The Process Properties dialog box shows that the System Generator.do file is already
associated as a custom file for this process.
Now if you double-click on the simulation process, the ModelSim console opens, and the
associated custom do file is used to compile and run your System Generator testbench. The
testbench uses the same input stimuli that was generated in Simulink, and compares the
HDL simulation results with the Simulink results. Provided that your design was error
free, ModelSim reports that the simulation finished without errors.
Generating an FPGA Bitstream
Xilinx ISE Project Navigator
During code generation, the System Generator creates several project files for use in Xilinx
and partner software tools. One of these project files is for the Xilinx ISE® Project
Navigator tool. By opening this project file, you can import your System Generator design
into the Project Navigator, and from there, you can synthesize, simulate, and implement
the design. This file is called <design_name>_cw.ise and it is created in the target
directory specified in the System Generator block.
Note:
my_project_cw.ise is used in the following discussion.
Opening a System Generator Project
You may double-click on your .ise file in Windows Explorer. The Project Navigator file
association with .ise causes Project Navigator to launch, opening your
my_project_cw.ise System Generator design project. You may also open the Project
Navigator tool directly, then choose File > Open Project from the top-level pull down
menu. Browse to the location of your System Generator my_project_cw.ise and open
it.