User guide

386 www.xilinx.com System Generator for DSP User Guide
UG640 (v 12.2) July 23, 2010
Chapter 5: System Generator Compilation Types
The following table shows subdirectory structure of the pcore that is generated by System
Generator:
System Generator Ports as Top-Level Ports in EDK
Input and output ports created in System Generator are made available to the EDK tool as
ports on the peripheral. You may pull these ports to the top-level of the EDK design. This
is useful for instance when the System Generator design has ports that go to the
input/output pads on the FPGA device.
Supported Processors and Current Limitations
Currently, PLB v4.6 memory-map links and FSL memory-map links to the MicroBlaze™
processor are exported with the EDK Export Tool. There can only be one instance of an
EDK Processor block.
See Also:
EDK Processor
pcore
Subdirectory
Description
data The data directory contains four files: BBD, PAO, MPD and
TCL.
• The BBD (black-box definition) file tells the EDK what EDN
or NGC files are used in the design.
• The PAO (peripheral analyze order) file tells the EDK the
analyze order of the HDL files.
• The MPD (Microprocessor Peripheral Description) file tells
the EDK how the peripheral will connect to the processor.
• The TCL file is used by LibGen when elaborating software
drivers for this peripheral.
doc Documentation files in HTML format.
hdl The hdl directory contains the hdl files produced by System
Generator.
netlist The netlist directory contains the EDN and NGC files listed by
the BBD file
src Source files for the software drivers.