User guide

360 www.xilinx.com System Generator for DSP User Guide
UG640 (v 12.2) July 23, 2010
Chapter 4: Importing HDL Modules
shutter_config.m – The configuration M-function for the Verilog black box,
including the parameter setting. The configuration M-function uses methods referring
to VHDL syntax even for configuring Verilog black boxes. Thus for this black box, you
have the lines:
this_block.setEntityName('shutter');
this_block.addGeneric('din_width', dwidth);
Black Box Tutorial Example 4: Importing a Verilog Module
1. Navigate into the example4 directory and open the example model.
This is a simple design with two black boxes, one VHDL and the other Verilog. The
VHDL black box computes the parity of each input word, and the Verilog black box
latches the words that have odd parity. No Simulink model is used to compute the
behavior of the black boxes; instead, HDL co-simulation is used. The example model is
shown in the figure below.
You must have a license for mixed-mode ModelSim simulation to run this example. If
you do and you run the simulation, you will see a ModelSim waveform window that
looks like the one captured below. The behavior of both black boxes is shown. You can
browse the design structure in ModelSim to see how System Generator has combined
the two black boxes.