User guide

356 www.xilinx.com System Generator for DSP User Guide
UG640 (v 12.2) July 23, 2010
Chapter 4: Importing HDL Modules
9. Go to the Simulink Library Browser and add a ModelSim block to this subsystem. The
ModelSim block is located in the Xilinx Blockset /Tools library. This block enables the
black box to communicate with a ModelSim simulator. Double click on the ModelSim
block to open the dialog box shown below:
10. Make sure the parameters match those shown in the preceding figure. Close the dialog
box.
11. From the Simulink menu, select Port Data Types from the Format menu to display the
port types for the black box. Compile the model (Ctrl-d) to ensure the port data types
are up to date. Notice that the black box port output type is UFix_26_0. This means it
is unsigned, 26 bits wide and has a binary point 0 positions to the left of the least
significant bit.
12. Open the configuration M-function transpose_fir_config.m and change the
output type from UFix_26_0 to Fix_26_12. The modified line should read:
dout_port.setType('Fix_26_12');
13. Edit the configuration M-function to associate an additional HDL file with the black
box. Locate the line:
this_block.addFile('transpose_fir.vhd');
Immediately above this line, add the following:
this_block.addFile('mac.vhd');