User guide

314 www.xilinx.com System Generator for DSP User Guide
UG640 (v 12.2) July 23, 2010
Chapter 3: Using Hardware Co-Simulation
Obtaining Platform Information
SBDBuilder (or alternatively, the board support package template files) require certain
information about your FPGA board. The table below lists the information you need.
You may obtain the clock pin location and period from any number of possible sources,
including the vendor documentation, existing constraints files, or vendor online
documentation/support.
If you do not know which devices are in your board's boundary scan chain, you may use
iMPACT to assist you in finding this information. iMPACT is a tool that is included with
the Xilinx ISE® software that allows you to perform device configuration and file
generation functions. When the tool is invoked, it automatically detects the contents of
your board's boundary scan chain, and displays these contents graphically, as shown
below.
Information Description
Clock pin location Pin location constraint for the FPGA system clock source.
Clock period Period constraint for the FPGA system clock source.
Device position in the
Boundary Scan Chain
Tells the position of the target FPGA in the board's Boundary Scan
Chain. Indexing begins at 1, with device 1 being the first device in
the chain.
Instruction register
lengths
Instruction register length of every device in the Boundary Scan
Chain.