User guide

System Generator for DSP User Guide www.xilinx.com 271
UG640 (v 12.2) July 23, 2010
Real-Time Signal Processing using Hardware Co-Simulation
Support for Coefficient Reloading
An interesting characteristic of the kernel data path is that its coefficients can be
dynamically reloaded at run-time. The 5x5 filter block includes Load and Coef control
ports, which are driven by the coefficient_memory subsystem.
The coefficient_memory contains a copy of the most recently loaded filter coefficients,
which are stored in an unprotected shared memory named coef_buffer. During run-
time, the subsystem monitors the shared memory contents, and initiates a reload sequence
if detects a change. By co-simulating the unprotected shared memory, any process on the
host PC may write new kernel coefficients simply by writing to a shared memory object
named coef_buffer. This interface is convenient, as communication with the FPGA
hardware is completely abstracted through the Shared Memory API.
Compiling for Hardware Co-simulation
The full filter kernel design must be compiled for hardware co-simulation before it can be
simulated.
5. Double click on the System Generator block located at the top of the
conv5x5_video_ex model.
6. Select an appropriate hardware co-simulation target.
7. Press the Generate button to compile the design for hardware co-simulation.
A hardware co-simulation block is created once the design finishes compiling.
Hardware co-simulation blocks include information about any shared memories, registers,
or FIFOs that were compiled as part of the design. You may view this information by
double-clicking on the hardware co-simulation block to open the parameters dialog box.