User guide

System Generator for DSP User Guide www.xilinx.com 257
UG640 (v 12.2) July 23, 2010
Frame-Based Acceleration using Hardware Co-Simulation
available in the input FIFO. Conversely, data is written into the output FIFO whenever
valid data is present on the data path.
To gain a better understanding of how the Shared FIFOs are used, you will now take a look
at an example design that uses vector transfers to accelerate a MAC filter design.
1. From the MATLAB console, change directory to
<ISE_Design_Suite_tree>/sysgen/examples/shared_memory/hardware_
cosim/frame_acc.
2. Open macfir_sw_w_fifos.mdl from the MATLAB console.
The example design implements a 32-tap MAC FIR filter that removes additive white noise
from a sinusoid input source. The amount of white noise can be adjusted interactively by
moving the Slider Gain control bar before or during simulation. An output scope compares
the filtered output data against the unfiltered input data. The MAC filter itself is contained
inside a subsystem named hw_cosim. This subsystem contains all of the logic that will be