User guide

System Generator for DSP User Guide www.xilinx.com 217
UG640 (v 12.2) July 23, 2010
Designing with Embedded Processors and Microcontrollers
b. Expand the Xilinx C/C++ ELF tree and select hello_world_0 Configuration.
Configure the COM port by clicking on the STDIO Connection tab and select the
COM port and BAUD Rate to match your PC settings as shown by the figure
below, then click Apply.
c. Close the dialog box for now.
Note:
Keep the following expected behavior in mind when debugging this simple Embedded DSP
application.
♦
MicroBlaze creates a impulse signal that is transferred into the “din” FIFO shared
memory.
♦ This input impulse response is then propagated through the input din of the FIR
Compiler IP with filter coefficients of 1~16.
♦ The FIR Compiler outputs are then captured by the MicroBlaze via the “dout”
FIFO shared memory. In this case the outputs are simply the filter coefficients,
which are 1, 2, 3, 4…16.
12. Highlight the file hello_world_0.elf under the Debug folder and select the pulldown
menu Run > Debug to initiate a debug session
Note:
Click Yes on the next screen