User guide

System Generator for DSP User Guide www.xilinx.com 19
UG640 (v 12.2) July 23, 2010
Design Flows using System Generator
Algorithm Exploration
System Generator is particularly useful for algorithm exploration, design prototyping, and
model analysis. When these are the goals, you can use the tool to flesh out an algorithm in
order to get a feel for the design problems that are likely to be faced, and perhaps to
estimate the cost and performance of an implementation in hardware. The work is
preparatory, and there is little need to translate the design into hardware.
In this setting, you assemble key portions of the design without worrying about fine points
or detailed implementation. Simulink blocks and MATLAB M-code provide stimuli for
simulations, and for analyzing results. Resource estimation gives a rough idea of the cost
of the design in hardware. Experiments using hardware generation can suggest the
hardware speeds that are possible.
Once a promising approach has been identified, the design can be fleshed out. System
Generator allows refinements to be done in steps, so some portions of the design can be
made ready for implementation in hardware, while others remain high-level and abstract.
System Generator's facilities for hardware co-simulation are particularly useful when
portions of a design are being refined.
Implementing Part of a Larger Design
Often System Generator is used to implement a portion of a larger design. For example,
System Generator is a good setting in which to implement data paths and control, but is
less well suited for sophisticated external interfaces that have strict timing requirements. In
this case, it may be useful to implement parts of the design using System Generator,
implement other parts outside, and then combine the parts into a working whole.
A typical approach to this flow is to create an HDL wrapper that represents the entire
design, and to use the System Generator portion as a component. The non-System
Generator portions of the design can also be components in the wrapper, or can be
instantiated directly in the wrapper.
Implementing a Complete Design
Many times, everything needed for a design is available inside System Generator. For such
a design, pressing the Generate button instructs System Generator to translate the design
into HDL, and to write the files needed to process the HDL using downstream tools. The
files written include the following:
• HDL that implements the design itself;
• A clock wrapper that encloses the design. This clock wrapper produces the clock and
clock enable signals that the design needs.
• A HDL testbench that encloses the clock wrapper. The testbench allows results from
Simulink simulations to be compared against ones produced by a logic simulator.
• Project files and scripts that allow various synthesis tools, such as XST and Synplify
Pro to operate on System Generator HDL
• Files that allow the System Generator HDL to be used as a project in Project
Navigator.
For details concerning the files that System Generator writes, see the topic Compilation
Results.