User guide

System Generator for DSP User Guide www.xilinx.com 183
UG640 (v 12.2) July 23, 2010
Designing with Embedded Processors and Microcontrollers
You can then use the following single-word write access function to write to the a shared
register:
// -- Set the a port register to 2
xc_write(iface, toreg_a->din, 2);
Copy and paste the above code into your source code file MyProject.c
A reference copy of the full code of MyProject.c is located at the following pathname:
<ISE_Design_Suite_tree>/sysgen/examples/EDK/DSP48CoProcessor/MyProject
.c
Create a Hardware Co-Simulation Block
The complete Simulink model can be simulated through hardware co-simulation. Make
sure that the shared memories are added into the Memory Maps window and the EDK
Processor block is configured for HDL netlisting. These are required for hardware co-
simulation.
Open the dialog box of the System Generator token in the same subsystem as the EDK
Processor block. You generate the hardware co-simulation block from this level of the
model so that only the imported MicroBlaze processor runs in hardware while the rest of
the design is kept in Simulink for software simulation.
Under the Compilation menu select Hardware Co-simulation > ML402 > Ethernet >
Point-to-point. Next, press the Generate button to begin the compilation process. This
may take some time. Upon completion, a hardware co-simulation block is created that
contains a MicroBlaze processor.