User guide

System Generator for DSP User Guide www.xilinx.com 167
UG640 (v 12.2) July 23, 2010
Designing with Embedded Processors and Microcontrollers
Architecture Highlights
• Predictable performance, two clock cycles per instruction
• 43 - 66 MIPS (dependent upon device type and speed grade)
• Fast interrupt response
• 96 slices, 0.5 to 1 block RAM
• 16 8-bit general-purpose registers
• 64-byte internal RAM
• Internal 31-location CALL/RETURN stack
• 256 input and 256 output ports
PicoBlaze Instruction Set Architecture
PicoBlaze is a hardware-centric microcontroller, which can be programmed using
assembly code. It supports a program length up to 1024 instructions. Requirements for
larger program space are typically addressed by using multiple microcontrollers.
16 General Purpose Registers
There are 16 8-bit general-purpose registers specified 's0' to 'sF'.
rs Output Read Strobe.
ws Output Write Strobe.
addr[9:0] Output Address of the next instruction.
ack Output Interrupt Acknowledge.
Signal Direction Description