User guide

System Generator for DSP User Guide www.xilinx.com 135
UG640 (v 12.2) July 23, 2010
Using ChipScope Pro Analyzer for Real-Time Hardware Debugging
♦ Double click on the System Generator token and verify the parameter settings as
follows:
10. Bitstream Generation
Xilinx System Generator software automatically calls both the Core Generator™ and
ChipScope generator to create the netlist and cores. In addition, when the Bitstream
target is selected, a configuration bitstream is created.
♦ Create a bitstream by pressing the Generate button.
♦ The Core Generator is automatically called to generate the Sine/Cosine table and
Counter netlists. ChipScope generator is called to create an Integrated Logic
Analyzer (ILA) core and an ICON core to communicate with the ChipScope Pro
software via the JTAG port.
Real-Time Debug
The next step is to run the design on the ML506 platform and view the probed outputs with
the ChipScope™ Pro Analyzer.