User guide

116 www.xilinx.com System Generator for DSP User Guide
UG640 (v 12.2) July 23, 2010
Chapter 1: Hardware Design Using System Generator
It is possible to increase or decrease the precision of the Xilinx Filter in order to reach the
perfect area/performance/quality trade off required by your design specifications.
Stop the simulation and modify the coefficient width to FIX_10_10 and the data width to
FIX_8_6 from the block GUI. Update the model (Ctrl-d) and push into the MAC engine
block. You should now notice that the datapath has been automatically updated to only
eighteen bits on the output of the multiplier and twenty on the output of the accumulator.