User`s guide

3 Simulink 4.1 Release Notes
3-8
Block Library
This section describes enhancements to the Simulink block libraries.
Unified Pulse Generator
This version merges the Discrete Pulse Generator block into the Pulse
Generator block. The combined block has two modes: time-based and
sample-based (discrete). Time-based mode varies the step size when a variable
step solver is being used to ensure that simulation steps occur at pulse on/off
transitions. When a fixed step solver is used, the time-based mode computes a
fixed step size that ensures that a simulation step occurs at every pulse
transition. The Pulse Generator block also outputs a pulse of any real data type
in sample-based as well as time-based mode.
Control Flow Blocks
Simulink 4.1 adds an If block and Switch Case block that can drive
conditionally executed subsystems that contain instances of the new Action
Port block. Action subsystems are similar to enabled subsystems, except that
all blocks must run at the same rate as the If or Switch Case block.
This version also adds a For Iterator block and a While Iterator block. When
placed in a subsystem, these blocks cause all of the blocks in the system to run
multiple cycles during a time step. The block cycle in a For Iterator subsystem
runs a specified number of times. The block cycle in a While Iterator subsystem
runs until a specified condition is false. A user can limit execution of a While
Iterator subsystem to a specified number of iterations to avoid infinite loops.
The new Assignment block allows a model to assign values to specified
elements of a signal.
Bus Creator
Simulink 4.1 adds a Bus Creator block that combines the output of multiple
blocks into a single signal bus. A model can use the existing Signal Selector
block to extract signals from the bus. The block’s dialog box allows you to assign
names to signals on the bus or allow the signals to inherit their names from
their sources. When you double-click on a signal name in the block dialog, the
source block is highlighted. There is no execution overhead in the use of bus
creator/bus selector blocks.