Datasheet

[AK4646]
MS0557-E-06 2011/06
- 56 -
Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
01H Power Management 2 0 0 0 0 M/S 0 MCKO PMPLL
R/W R R R R R/W R R/W R/W
Default 0 0 0 0 0 0 0 0
PMPLL: PLL Power Management
0: EXT Mode and Power-Down (default)
1: PLL Mode and Power-up
MCKO: Master Clock Output Enable
0: Disable: MCKO pin = “L” (default)
1: Enable: Output frequency is selected by PS1-0 bits.
M/S: Master / Slave Mode Select
0: Slave Mode (default)
1: Master Mode
Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
02H Signal Select 1 SPPSN BEEPS DACS DACL 0 PMMP
MGAIN2 MGAIN0
R/W R/W R/W R/W R/W R R/W R/W R/W
Default 0 0 0 0 0 0 0 1
MGAIN2-0: MIC-Amp Gain Control (
Table 19)
MGAIN1 bit is D5 bit of 03H.
PMMP: MPWR pin Power Management
0: Power-down: Hi-Z (default)
1: Power-up
DACL: Switch Control from DAC to Stereo Line Output
0: OFF (default)
1: ON
When PMLO bit is “1”, DACL bit is enabled. When PMLO bit is “0”, the LOUT/ROUT pins go to AVSS.
DACS: Switch Control from DAC to Speaker-Amp
0: OFF (default)
1: ON
When DACS bit is “1”, DAC output signal is input to Speaker-Amp.
BEEPS: Switch Control from MIN pin to Speaker-Amp
0: OFF (default)
1: ON
When BEEPS bit is “1”, mono signal is input to Speaker-Amp.
SPPSN: Speaker-Amp Power-Save Mode
0: Power-Save Mode (default)
1: Normal Operation
When SPPSN bit is “0”, Speaker-Amp is on power-save mode. In this mode, SPP pin goes to Hi-Z and SPN
pin is outputs SVDD/2 voltage. When PMSPK bit = “1”, SPPSN bit is enabled. After the PDN pin is set to
“L”, Speaker-Amp is in power-down mode since PMSPK bit is “0”.