Datasheet

[AK4646]
MS0557-E-06 2011/06
- 12 -
SWITCHING CHARACTERISTICS
(Ta = 25°C; AVDD =2.2 ∼ 3.6V, DVDD =1.6 ∼ 3.6V, SVDD =2.2 ∼ 4.0V; C
L
=20pF)
Parameter Symbol min typ max Units
PLL Master Mode (PLL Reference Clock = MCKI pin)
MCKI Input Timing
Frequency fCLK 12 - 27 MHz
Pulse Width Low tCLKL 0.4/fCLK - - ns
Pulse Width High tCLKH 0.4/fCLK - - ns
MCKO Output Timing
Frequency fMCK 0.2352 - 12.288 MHz
Duty Cycle
Except 256fs at fs=32kHz, 29.4kHz dMCK 40 50 60 %
256fs at fs=32kHz, 29.4kHz dMCK - 33 - %
LRCK Output Timing
Frequency fs 7.35 - 48 kHz
Duty Cycle Duty - 50 - %
BICK Output Timing
Period
BCKO bit = “0”
tBCK - 1/(32fs) - ns
BCKO bit = “1”
tBCK - 1/(64fs) - ns
Duty Cycle dBCK - 50 - %
PLL Slave Mode (PLL Reference Clock = MCKI pin)
MCKI Input Timing
Frequency fCLK 12 - 27 MHz
Pulse Width Low tCLKL 0.4/fCLK - - ns
Pulse Width High tCLKH 0.4/fCLK - - ns
MCKO Output Timing
Frequency fMCK 0.2352 - 12.288 MHz
Duty Cycle
Except 256fs at fs=32kHz, 29.4kHz dMCK 40 50 60 %
256fs at fs=32kHz, 29.4kHz dMCK - 33 - %
LRCK Input Timing
Frequency fs 7.35 - 48 kHz
Duty Duty 45 - 55 %
BICK Input Timing
Period tBCK 1/(64fs) - 1/(32fs) ns
Pulse Width Low tBCKL 0.4 x tBCK - - ns
Pulse Width High tBCKH 0.4 x tBCK - - ns