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FC protocol, version 1, M68HC908 implementation
Developer’s Serial Bootloader, Rev. 13
Freescale Semiconductor 13
Figure 14. Simplified example of memory allocation in MC68HC908KX8
3.1 Memory allocation
The bootloader code occupies the top-end of FLASH memory (the highest memory address space). This
placement allows an effective use of the FLASH block protection technique (see the specific MCU data
sheet for details).
3.2 FLASH Block Protection Register (FLBPR)
By setting a FLBPR (FLASH block protection register), all address space above this address is protected
from intentional and unintentional erasing/rewriting. After both bootloader and FLBPR register are
programmed into memory, the bootloader code is protected from unintentional modification by user code.
NOTE
Some M68HC908 MCUs have an FLBPR register in RAM instead of
FLASH (for example, the MC68HC908JK/JL Families). The bootloader
code sets this register properly but the user code can eventually modify
FLBPR and erase/write the bootloader code. See FLBPR not usable (in
some M68HC08 family MCUs).
For example, the MC68HC908KX8 bootloader to the PC memory allocation is:
• $01 - Version 1, read command not implemented (bit 7).
• $E000 - Start address of reprogrammable memory area.
• $FC80 - End address of reprogrammable memory area + 1.