User`s manual

207 assign tv_out_hsync_b = 1’b1;
208 assign tv_out_vsync_b = 1’b1;
209 assign tv_out_blank_b = 1’b1;
210 assign tv_out_subcar_reset = 1’b0;
211
212 // Video Input
213 //assign tv_in_i2c_clock = 1’b0;
214 assign tv_in_fifo_read = 1’b1;
215 assign tv_in_fifo_clock = 1’b0;
216 assign tv_in_iso = 1’b1;
217 //assign tv_in_reset_b = 1’b0;
218 assign tv_in_clock = clock_27mhz;//1’b0;
219 //assign tv_in_i2c_data = 1’bZ;
220 // tv_in_ycrcb, tv_in_data_valid, tv_in_line_clock1, tv_in_line_clock2,
221 // tv_in_aef, tv_in_hff, and tv_in_aff are inputs
222
223 // SRAMs
224 assign ram0_data = 36’hZ;
225 assign ram0_address = 19’h0;
226 assign ram0_adv_ld = 1’b0;
227 assign ram0_clk = 1’b0;
228 assign ram0_cen_b = 1’b1;
229 assign ram0_ce_b = 1’b1;
230 assign ram0_oe_b = 1’b1;
231 assign ram0_we_b = 1’b1;
232 assign ram0_bwe_b = 4’hF;
233 assign ram1_data = 36’hZ;
234 assign ram1_address = 19’h0;
235 assign ram1_adv_ld = 1’b0;
236 assign ram1_clk = 1’b0;
237 assign ram1_cen_b = 1’b1;
238 assign ram1_ce_b = 1’b1;
239 assign ram1_oe_b = 1’b1;
240 assign ram1_we_b = 1’b1;
241 assign ram1_bwe_b = 4’hF;
242 assign clock_feedback_out = 1’b0;
243 // clock_feedback_in is an input
244
245 // Flash ROM
246 // assign flash_data = 16’hZ;
247 // assign flash_address = 24’h0;
248 // assign flash_ce_b = 1’b1;
249 // assign flash_oe_b = 1’b1;
250 // assign flash_we_b = 1’b1;
251 // assign flash_reset_b = 1’b0;
252 // assign flash_byte_b = 1’b1;
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