User`s manual

115
116 analyzer1_data, analyzer1_clock,
117 analyzer2_data, analyzer2_clock,
118 analyzer3_data, analyzer3_clock,
119 analyzer4_data, analyzer4_clock);
120
121 output beep, audio_reset_b, ac97_synch, ac97_sdata_out;
122 input ac97_bit_clock, ac97_sdata_in;
123
124 output [7:0] vga_out_red, vga_out_green, vga_out_blue;
125 output vga_out_sync_b, vga_out_blank_b, vga_out_pixel_clock,
126 vga_out_hsync, vga_out_vsync;
127
128 output [9:0] tv_out_ycrcb;
129 output tv_out_reset_b, tv_out_clock, tv_out_i2c_clock, tv_out_i2c_data,
130 tv_out_pal_ntsc, tv_out_hsync_b, tv_out_vsync_b, tv_out_blank_b,
131 tv_out_subcar_reset;
132
133 input [19:0] tv_in_ycrcb;
134 input tv_in_data_valid, tv_in_line_clock1, tv_in_line_clock2, tv_in_aef,
135 tv_in_hff, tv_in_aff;
136 output tv_in_i2c_clock, tv_in_fifo_read, tv_in_fifo_clock, tv_in_iso,
137 tv_in_reset_b, tv_in_clock;
138 inout tv_in_i2c_data;
139
140 inout [35:0] ram0_data;
141 output [18:0] ram0_address;
142 output ram0_adv_ld, ram0_clk, ram0_cen_b, ram0_ce_b, ram0_oe_b, ram0_we_b;
143 output [3:0] ram0_bwe_b;
144
145 inout [35:0] ram1_data;
146 output [18:0] ram1_address;
147 output ram1_adv_ld, ram1_clk, ram1_cen_b, ram1_ce_b, ram1_oe_b, ram1_we_b;
148 output [3:0] ram1_bwe_b;
149
150 input clock_feedback_in;
151 output clock_feedback_out;
152
153 inout [15:0] flash_data;
154 output [23:0] flash_address;
155 output flash_ce_b, flash_oe_b, flash_we_b, flash_reset_b, flash_byte_b;
156 input flash_sts;
157
158 output rs232_txd, rs232_rts;
159 input rs232_rxd, rs232_cts;
160
91