User`s manual

89 newout <= 1; //let folks know we’ve got new data
90 end
91
92 DATA_LEAVING: //wait a cycle to clear the data to make sure we latch onto it correctly
93 begin
94 //rd <= 1; // ORIGINAL
95 state <= DATA_LEAVING_2;
96 newout <= 0; //let folks know the data’s a clock cycle old now
97 end
98
99 DATA_LEAVING_2: //wait another cycle to make sure that the RD to RD pre-charge time is met
100 state <= DATA_LEAVING_3;
101
102 DATA_LEAVING_3: //wait another cycle to make sure that the RD to RD pre-charge time is met
103 state <= DATA_LEAVING_4;
104
105 DATA_LEAVING_4: //wait another cycle to make sure that the RD to RD pre-charge time is met
106 state <= DATA_LEAVING_5;
107
108 DATA_LEAVING_5: //wait another cycle to make sure that the RD to RD pre-charge time is met
109 state <= DATA_LEAVING_6;
110
111 DATA_LEAVING_6: //wait another cycle to make sure that the RD to RD pre-charge time is met
112 begin
113 state <= WAIT;
114 rd <= 1;
115 end
116 default:
117 state <= WAIT;
118 endcase
119 end
120 endmodule
A.1.13 usb transfer script.py
1 #! /usr/bin/env python
2
3 import serial
4 import wave
5 import struct
6 import scipy
7
8
9 ’’’
10 6.111 USB transfer script
11 Luis Fernandez
87